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| Design method and robustness analysis of a novel phase-locked loop considering the dynamic performance of grid-connected inverters under high penetration |
| DOI：10.19783/j.cnki.pspc.240856 |
| Key Words:high penetration grid-connected inverter novel phase locked loop zero-pole configuration robustness |
| Author Name | Affiliation | | QU Keqing1 | 1. College of Electrical Engineering, Shanghai University of Electric Power, Shanghai 200090, China
2. Offshore Wind Power Research Institute, Shanghai University of Electric Power, Shanghai 200090, China | | GAO Chang1 | 1. College of Electrical Engineering, Shanghai University of Electric Power, Shanghai 200090, China
2. Offshore Wind Power Research Institute, Shanghai University of Electric Power, Shanghai 200090, China | | XU Yuecheng1 | 1. College of Electrical Engineering, Shanghai University of Electric Power, Shanghai 200090, China
2. Offshore Wind Power Research Institute, Shanghai University of Electric Power, Shanghai 200090, China | | ZHAO Jinbin2 | 1. College of Electrical Engineering, Shanghai University of Electric Power, Shanghai 200090, China
2. Offshore Wind Power Research Institute, Shanghai University of Electric Power, Shanghai 200090, China | | MAO Ling1 | 1. College of Electrical Engineering, Shanghai University of Electric Power, Shanghai 200090, China
2. Offshore Wind Power Research Institute, Shanghai University of Electric Power, Shanghai 200090, China | | ZENG Zhiwei1 | 1. College of Electrical Engineering, Shanghai University of Electric Power, Shanghai 200090, China
2. Offshore Wind Power Research Institute, Shanghai University of Electric Power, Shanghai 200090, China |
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| Abstract:To address the issue of system stability and dynamic performance degradation caused by the coupling between the output impedance of grid-connected inverters and grid impedance under high renewable energy penetration, a novel phase-locked loop (PLL) design method is proposed based on feedforward compensation from the perspective of optimizing PLL control structure. First, the output impedance model of the grid-connected inverter considering the influence of the PLL is established. Based on this model, the characteristics of traditional PLL and inertia-based PLL are analyzed. The results reveal that both types exhibit deteriorated dynamic and steady-state performance under weak grid conditions when subjected to grid disturbances. To solve the aforementioned issue, a small-signal model for the novel PLL structure based on feedforward compensation is derived through appropriate pole-zero placement of the closed-loop system. A parameter design method is provided, and a detailed analysis of the system’s performance is conducted. The analysis indicates that the proposed novel PLL enhances system robustness while providing additional inertia and damping, effectively addressing the system stability and dynamic performance degradation issue caused by PLL under weak grid conditions. Finally, the effectiveness of the proposed novel PLL design is validated through hardware-in-the-loop (HIL) experiments using RT-LAB. |
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