When there are harmonics and DC offset in a grid voltage, the traditional phase-locked loop (PLL) cannot accurately realize phase lock. Hence, an improved single-phase phase-locked loop algorithm based on recursive-form generalized delayed signal superposition (RGDSS) operators is proposed. To produce the orthogonal signals and filtering of the harmonic, RGDSS operators are introduced into the pre-stage of the PLL. Then in a two-phase stationary reference frame, a delayed sampling period filter is constructed to suppress the DC offset by delaying the orthogonal component by two sampling periods. The proposed PLL, which has good dynamic performance and stability, can effectively eliminate the influence of DC offset and harmonics, and obtain the fundamental and desired harmonic information quickly and accurately. Finally, the feasibility of the method is verified by simulation and experiment. This work is supported by the National Natural Science Foundation of China (No. 51577162).