This paper summarizes the status quo of studying VSC-HVDC, and discusses the redundant configuration methods of the Modular Multi-level Converter (MMC)’s Sub-Module (SM), and topological structure, control and protection, fault analysis, etc. The necessity of this study is justifiable on the grounds of realities. Moreover, this paper introduces and deduces the Markov process and applies it to propose a reliability analysis model for the main wiring diagram of a HVDC transmission project. Finally, the calculation of the model is carried out by the program written in Matlab. By comparing the results with the statistical data of ABB, it testifies that the method proposed is suitable for the reliability analysis of VSC-HVDC system. This work is supported by National Key Research and Development Program of China (No. 2016YFB0901001).